The present invention relates to a circuit board for semiconductor devices, in which interconnections are individually subjected to electric circuit testing in a state in which the semiconductor devices remain mounted on the board, and a method of manufacturing the circuit board for semiconductor devices.
Inner leads of a circuit board for semiconductor devices are often electroplated for ensuring desirable electric connection with semiconductor chips. In this case, interconnections extending from the inner leads desired to be electroplated are short-circuited for current-carrying. FIG. 6 shows a related art circuit board 1 for semiconductor devices of this type. In this circuit board 1, to increase the number of semiconductor devices per unit area, interconnections 3 are collectively connected to lead wire patterns 5 for electroplating which are formed as a pattern on the board 1.
The board 1 is dipped in an electroplating solution, and inner leads are electroplated by carrying a current to the lead wire patterns 5 for electroplating. After the inner leads are electroplated, a semiconductor chip (not shown) is mounted on each die pad portion 7 of the board 1, and the inner leads are connected to bump electrodes of the semiconductor chip by using an inner lead bonder, so that the bump electrodes are connected to a plurality of terminals provided on the underside of the board 1. Then, the upper surface, on which the inner leads are formed, of the board 1 is sealed with a sealing resin, and the sealing resin is cut in such a manner that the lead wire pattern 5 for electroplating is cut off, to thereby take a plurality of semiconductor devices out of the board 1.
The related art circuit board for semiconductor devices, however, has a disadvantage. In this circuit board, until just before the sealing resin is cut, the lead wire pattern for electroplating remains and thereby the interconnections and the terminals remain short-circuited to each other, and accordingly, the interconnections cannot be subjected to electric circuit testing in the state in which the semiconductor devices are mounted on the board. As a result, there is a possibility that semiconductor devices, which have defects in the state being mounted on the board, are assembled. This becomes one factor of reducing the yield of the assembled semiconductor devices.
FIG. 7 shows another related art circuit board for semiconductor devices, in which lead wire patterns 5 for electroplating are individually led from interconnections 3. In this circuit boars, the interconnections 3 can be subjected to electric circuit testing in the state in which the semiconductor devices are mounted on the board; however, there arises a problem that the number of semiconductor devices within the board is significantly reduced, to thereby raise the assembling cost.
FIGS. 8 and 9 show a further related art circuit board for semiconductor devices, in which a lead wire pattern for electroplating is cut off by forming through-holes 9 in the board 1. In this circuit board, interconnections can be subjected to electric circuit testing in the state in which the semiconductor devices are mounted on the board 1; however, there arises a problem that the sealing resin is leaked to a terminal portion on the back surface of the board 1, leading to occur a failure.
An object of the present invention is to provide a circuit board for semiconductor devices, which is capable of subjecting interconnections to electric circuit testing without a reduction in the number of semiconductor devices within the board, and preventing leakage of resin to a terminal portion on the back surface of the board, thereby improving the assembling yield, and reducing the failures and the assembling cost, and a method of manufacturing the circuit board for semiconductor devices.
To achieve the above object, according to a first aspect of the present invention, there is provided a circuit board for semiconductor devices, including: inner leads formed on a board; interconnections extending from the inner leads; and a lead wire formed on said board in such a manner as to short-circuit the interconnections to each other; wherein the inner leads are electroplated by carrying a current to the lead wire of the board dipped in an electroplating solution; and the lead wire of the board is removed after the inner leads are electroplated.
With this configuration, since the lead wire is removed after the inner leads are electroplated, the interconnections extending from the inner leads, connected to each other via the lead wire, are made independently non-conductive. Accordingly, each of the interconnections can be subjected to electric circuit testing. Also, since lead wires are not required to be extracted from individual interconnections, the number of semiconductor devices within the board is not reduced. Further, since the through-holes are not formed in the board the leakage of the resin does not occur to a terminal portion on the back surface of the board. As a result, it is possible to eliminate an inconvenience that defective semiconductor devices in the state being mounted on the board are assembled, and hence to improve the assembled semiconductor devices and reduce the assembling cost.
According to a second aspect of the present invention, there is provided a method of manufacturing a circuit board for semiconductor devices, which includes inner leads formed on a board, interconnections extending from the inner leads, and a lead wire formed on the board in such a manner as to short-circuit the board in such a manner as to short-circuit the interconnections to each other, the method including the steps of: electroplating the inner leads by carrying a current to the lead wire of the board dipped in an electroplating solution; and removing, after the electroplating step, the lead wire by chemical corrosion.
With this configuration, after the inner leads are electroplated, the lead wire is removed by chemical corrosion, and accordingly, it is possible to eliminate the necessity of formation of through-holes for removal of the lead wire in the board, and hence to eliminate the leakage of resin and the reduction in strength of the board.
According to a third aspect of the present invention, there is provided a method of manufacturing a circuit board for semiconductor devices, which includes inner leads formed on a board, interconnections extending from the inner leads, and a lead wire formed on the board in such a manner as to short-circuit the interconnections to each other, the method including the steps of: electroplating the inner leads by carrying a current to the lead wire of the board dipped in an electroplating solution; and removing, after the electroplating step, the lead wire and part of the board in the thickness direction from the surface on which the lead wire is formed, by mechanical polishing.
With this configuration, after the inner leads are electroplated, the lead wire and part of the board in the thickness direction from the surface on which the lead wire is formed are removed by mechanical polishing, and accordingly, it is possible to eliminate the necessity of formation of through-holes for removing the lead wire, and hence to eliminate the leakage of the resin and also remove the lead wire by using a relatively inexpensive apparatus as compared with the chemical corrosion manner.